NovaCustom V540TU (Maximized)

Table of contents

1. NovaCustom V540TU (Maximized)
   1. ✅ Active: CPU generation still receiving microcode updates (14th Gen Meteor Lake)
   2. ✅ PROTECTED: TPM GPIO Reset
   3. ⚡ Safety First
   4. Disassembly
   5. Flashing

✅ Active: CPU generation still receiving microcode updates (14th Gen Meteor Lake)

Still receiving microcode updates. See BOARDS_AND_TESTERS.md, Heads threat model.

✅ PROTECTED: TPM GPIO Reset

GPIO PLTRST# assertion does not apply to the TPM on this platform. Not vulnerable. See Per-Board Protection Status, TPM GPIO Reset Vulnerability.

⚡ Safety First

Before starting, please read our SPI Programmer Best Practices guide for essential safety information and programmer recommendations.

Disassembly

Full disassembly instructions, SPI chip details (socket-mounted WSON8), programmer recommendations, and step-by-step flashing procedures are maintained by Dasharo:

→ Dasharo V540TU documentation → Dasharo V540TU initial deployment → Dasharo V540TU hardware matrix

Flashing

Key notes: Socket-mounted WSON8 — chip must be physically extracted and re-flashed externally (in-circuit clips not applicable). Two-step flash (IFD first, then ME+BIOS). No full binaries available. EC flashed separately via ite_ec. Dasharo TrustRoot (CPU fusing) available — irreversible once enabled.